Semiconductor devices are used in a variety of applications, such as personal computers, cell phones, digital cameras, and other electronic equipment. Semiconductor devices can be divided into a simple hierarchy consisting of devices such as integrated circuit (IC) dies, packages, printed circuit boards (PCB), and systems. The package is the interface between an IC die and a PCB. IC dies are made from semiconductor materials such as silicon. Dies are then assembled into a package. The packaged die is then attached either directly to a PCB or to another substrate, which is defined as the second level packaging.
The semiconductor industry continues to improve the integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.) by continual reductions in minimum feature size, which allow more components to be integrated into a given area. These smaller electronic components also require smaller packages that utilize less area than packages of the past. Some smaller types of packages for semiconductor devices include quad flat pack (QFP), pin grid array (PGA), ball grid array (BGA), flip chips (FC), three dimensional integrated circuits (3DIC), wafer level packages (WLP), wafer-level chip scale packages (WLCSP), and package on package (PoP) devices.
In a typical manufacturing process, active and passive devices may be made within a substrate, and connected by interconnect structures such as metal contacts formed on metallization layers and dielectric layers. Contact pads are formed above the metallization layers to make connections to packages. Typically, redistribution layers (RDLs) or post-passivation interconnects (PPI) may be used to fan out wires for contact pads, followed by the formation of UBM pads connected to RDLs, and solder balls on the UBM pads to establish electrical contacts between contact pads of a chip such as input/output pads and the substrate or lead frame of the package.
The package structure produced by the typical manufacturing process is found to have the passivation layer delamination issue caused by the stress concentration at the RDLs. Methods and apparatus are needed to reduce the stress concentration at the RDLs to solve the passivation layer delamination issue for packages.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the preferred embodiments and are not necessarily drawn to scale.